As feature sizes in integrated circuits are decreased to 0.18 .mu.m and below, issues of signal delay, power consumption, and crosstalk become increasingly significant. Miniaturization generally results in increased crosstalk or capacitive coupling between conductors which is associated with increased signal delay. One way to diminish capacitive coupling is to decrease the dielectric constant of the insulating material which separates conducting paths.
Silicon dioxide (SiO.sub.2) has long been used in integrated circuits as the primary insulating material. With a dielectric constant of approximately 4, SiO.sub.2 has a relatively low dielectric constant for an inorganic material. One option for achieving a dielectric material with a lower dielectric constant is to use organic or polymeric materials. For example, a class of poly-p-xylylenes termed parylenes has been identified as candidate insulating materials. Parylene films derived from the parylene AF4 dimer, chemical name octafluoro-[2,2]paracyclophane, have dielectric constants down to 2.24 and other variants are being tested which may have even lower dielectric constants. Fluorinated poly(arylene ethers) have also been identified as low dielectric constant materials and polytetrafluoroethylene, known commercially as TEFLON.RTM., or related fluoropolymers are known to have dielectric constants down to approximately 1.7.
Fabrication of integrated circuit devices typically requires numerous processing steps to deposit and pattern multiple layers of conducting and insulating materials. One of these processing steps is reactive ion etching (RIE), which uses chemically reactive radicals and ions to remove material from a surface of a semiconductor device to produce desired features. Reactive Ion Etching is described, for example, in Chapter 16 of Wolf and Tauber, Silicon Processing for the VLSI Era Vol1. [Lattice Press, 1986] which lists process gases conventionally used to etch different materials. For organic solids, oxygen or gas mixtures including oxygen are conventionally used. However, exposure of a layer of a fluorinated organic polymer such as AF4 to an RIE plasma conventionally used for organic materials, results in plasma surface damage leading to reduced thermal stability of the etched AF4 surface.
What is needed is a way to minimize RIE etch damage so that low dielectric constant organic polymer insulators can be readily integrated with typical semiconductor fabrication processes.